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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AT89C5131A-RDTIM датащи(PDF) 151 Page - ATMEL Corporation |
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AT89C5131A-RDTIM датащи(HTML) 151 Page - ATMEL Corporation |
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151 / 184 page  151 AT89C5130A/31A-M 4337C–USB–02/05 Power Monitor The POR/PFD function monitors the internal power-supply of the CPU core memories and the peripherals, and if needed, suspends their activity when the internal power sup- ply falls below a safety threshold. This is achieved by applying an internal reset to them. By generating the Reset the Power Monitor insures a correct start up when AT89C5131 is powered up. Description In order to startup and maintain the microcontroller in correct operating mode, V CC has to be stabilized in the V CC operating range and the oscillator has to be stabilized with a nominal amplitude compatible with logic level VIH/VIL. These parameters are controlled during the three phases: power-up, normal operation and power going down. See Figure 72. Figure 72. Power Monitor Block Diagram Note: 1. Once XTAL1 High and low levels reach above and below VIH/VIL. a 1024 clock period delay will extend the reset coming from the Power Fail Detect. If the power falls below the Power Fail Detect threshold level, the Reset will be applied immediately. The Voltage regulator generates a regulated internal supply for the CPU core the mem- ories and the peripherals. Spikes on the external Vcc are smoothed by the voltage regulator. VCC Power On Reset Power Fail Detect Voltage Regulator XTAL1 (1) CPU core Memories Peripherals Regulated Supply RST pin Hardware Watchdog PCA Watchdog Internal Reset |
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